1. Field of the Invention
The present invention relates generally to systems and methods to configure a projection apparatus comprising a mirror device. More particularly, this invention relates to systems and methods to configure an image projection system with a mirror device implemented with a liquid-cooled package.
2. Description of the Related Art
Even though there have been significant advances made in recent years in technologies implementing an electromechanical mirror device as a spatial light modulator (SLM), there are still limitations and difficulties when it is employed to display a high quality image. Specifically, when the images are digitally controlled, the image quality is adversely affected due to the fact that the images are not displayed with a sufficient number of gray scales.
An electromechanical mirror device implemented as the spatial light modulator (SLM) for an image projection apparatus has recently drawn a considerable amount of popular interest. The electromechanical mirror device commonly employs a relative large number of micromirrors configured as a “mirror array”. In general, the number of mirror elements ranges from 60,000 to several millions, placed on the surface of a substrate in an electromechanical mirror device.
Referring to FIG. 1A, an image display system 1 including a screen 2 is disclosed in a relevant U.S. Pat. No. 5,214,420. A light source 10 is used to generate light beams to project illumination for the display images on the display screen 2. The light 9 projected from the light source is further concentrated and directed toward lens 12 by way of mirror 11. Lenses 12, 13 and 14 form a beam columnator operative to columnate the light 9 into a column of light 8. A spatial light modulator 15 is controlled by a computer 19 through data transmitted over data cable 18 to selectively redirect a portion of the light from path 7 toward lens 5 to display on screen 2. FIG. 1B shows a SLM 15 that has a surface 16 that includes an array of switchable reflective elements 17, 27, 37, and 47, each of these reflective elements is attached to a hinge 30. When the element 17 is in an ON position, a portion of the light from path 7 is reflected and redirected along path 6 to lens 5 where it is enlarged or spread along path 4 to impinge on the display screen 2 to form an illuminated pixel 3. When the element 17 is in an OFF position, the light is reflected away from the display screen 2 and, hence, pixel 3 is dark.
Each of the mirror elements constituting a mirror device functions as a spatial light modulator (SLM), and each mirror element comprises a mirror and electrodes. A voltage applied to the electrode(s) generates a coulomb force between the mirror and the electrode(s), making it possible to control and incline the mirror. The inclined mirror is “deflected” according to a common term used in this patent application for describing the operational condition of a mirror element.
When a mirror is deflected with a voltage applied to the electrode(s), the deflected mirror also changes the direction of the reflected light in reflecting an incident light. The direction of the reflected light is changed in accordance with the deflection angle of the mirror. The present patent application refers to the light reflected to a projection path designated for image display as “ON light”, and refers to a light reflected in a direction other than the designated projection path for image display as “OFF light”. When the light reflected by the mirror to the projection path is of lesser intensity than the “ON light”, because only a portion of the reflected light is directed in the ON light direction, it is referred to as “intermediate light”.
The present patent application defines an angle of rotation along a clockwise (CW) direction as a positive (+) angle and that of a counterclockwise (CCW) direction as a negative (−) angle. A deflection angle is defined as zero degrees (0°) when the mirror is in the initial state.
The on-and-off states of the micromirror control scheme, as that implemented in the U.S. Pat. No. 5,214,420 and in most conventional display systems, impose a limitation on the quality of the display. Specifically, applying the conventional configuration of a control circuit limits the gray scale gradations produced in a conventional system (PWM between ON and OFF states), limited by the LSB (least significant bit, or the least pulse width). Due to the ON-OFF states implemented in the conventional systems, there is no way of providing a shorter pulse width than the duration represented by the LSB. The least quantity of light, which determines the gray scale, is the light reflected during the least pulse width. The limited levels of the gray scale lead to a degradation of the display image.
Specifically, FIG. 1C is a schematic circuit diagram to illustrate a control circuit implemented in a mirror element for controlling a micromirror according to U.S. Pat. No. 5,285,407. The control circuit includes memory cell 32. Various transistors are referred to as “M*” where “*” designates a transistor number and each transistor is an insulated gate field effect transistor. Transistors M5, and M7 are p-channel transistors; transistors, M6, M8, and M9 are n-channel transistors. The capacitances, C1 and C2, represent the capacitive loads in the memory cell 32. The memory cell 32 includes an access switch transistor M9 and a latch 32a based on a Static Random Access Memory (SRAM) switch design. All access transistors M9 on an Row line receive a DATA signal from a different Bit-line 31a. The particular memory cell 32 is accessed for writing a bit to the cell by turning on the appropriate row select transistor M9, using the ROW signal functioning as a Word-line. Latch 32a consists of two cross-coupled inverters, M5/M6 and M7/M8, which permit two stable states that include a state 1 when is Node A high and Node B low, and a state 2 when Node A is low and Node B is high.
The mirror is driven by a voltage applied to the landing electrode and is held at a predetermined deflection angle on the landing electrode. An elastic “landing chip” is formed on a portion on the landing electrode that makes contact with the mirror, and assists in deflecting the mirror towards the opposite direction when the deflection of the mirror is switched. The landing chip is designed to have the same potential as the landing electrode, so that a shorting is prevented when the landing electrode is in contact with the mirror.
Each mirror formed on a device substrate has a square or rectangular shape, and each side has a length of 4 to 15 um. In this configuration, a portion of the reflected light is reflected not from the mirror surface but from the gaps between the mirrors or other surfaces of the structures of the mirror device. These “unintentional” reflections are not applied to project an image, however, are inadvertently generated and may interfere with the reflected light for image display. The contrast of the displayed image is degraded due to the interference generated from these unintentional reflections generated by the gaps between the mirrors. In order to overcome such problems, the mirrors are arranged on a semiconductor wafer substrate with a layout to minimize the gaps between the mirrors. One mirror device is generally designed to include an appropriate number of mirror elements, wherein each mirror element is manufactured as a deflectable mirror on the substrate for displaying a pixel of an image. The appropriate number of elements for displaying an image is configured in compliance with the display resolution standard according to the VESA Standard defined by Video Electronics Standards Association or by television broadcast standards. When a mirror device is configured with the number of mirror elements in compliance with WXGA (resolution: 1280 by 768) defined by VESA, the pitch between the mirrors of the mirror device is 10 μm, and the diagonal length of the mirror array is about 0.6 inches.
The control circuit, as illustrated in FIG. 1C, controls the mirrors to switch between two states, and the control circuit drives the mirror to oscillate to either an ON or OFF deflected angle (or position) as shown in FIG. 1A.
The minimum intensity of light reflected from each mirror element for image display, i.e., the resolution of gray scale of image display for a digitally controlled image display apparatus, is determined by the least length of time that the mirror may be controlled to stay in the ON position. The length of time a micromirror is in an ON position is controlled by a multiple bit word. FIG. 1D shows the “binary time intervals” when controlling micromirrors with a four-bit word. As shown in FIG. 1D, the time durations have relative values of 1, 2, 4, 8, which in turn define the relative brightness for each of the four bits where “1” is the least significant bit and “8” is the most significant bit. According to the control mechanism as shown, the minimum controllable differences between gray scales for showing different levels of brightness is a represented by the “least significant bit” that maintains the micromirror at an ON position.
For example, assuming n bits of gray scales, one time frame is divided into 2n−1 equal time periods. For a 16.7-millisecond frame period and n-bit intensity values, the time period is 16.7/(2n−1) milliseconds.
Having established these times for each pixel of each frame, pixel intensities are quantified such that black is a 0 time period, the intensity level represented by the LSB is 1 time period, and the maximum brightness is 2n−1 time periods. Each pixel's quantified intensity determines its ON-time during a time frame. Thus, during a time frame, each pixel with a quantified value of more than 0 is ON for the number of time periods that correspond to its intensity. The viewer's eye integrates the pixel brightness so that the image appears the same as if it were generated with analog levels of light.
For controlling deflectable mirror devices, the PWM applies data to be formatted into “bit-planes”, with each bit-plane corresponding to a bit weight of the intensity of light. Thus, if the brightness of each pixel is represented by an n-bit value, each frame of data has the n-bit-planes. Then, each bit-plane has a 0 or 1 value for each mirror element. According to the PWM control scheme described in the preceding paragraphs, each bit-plane is independently loaded and the mirror elements are controlled according to bit-plane values corresponding to the value of each bit during one frame. Specifically, the bit-plane according to the LSB of each pixel is displayed for 1 time period.
When adjacent image pixels are displayed with a very coarse gray scale caused by great differences in the intensity of light, thus, artifacts are shown between these adjacent image pixels. That leads to the degradations of image quality. The image degradations are especially pronounced in the bright areas of image where there are “bigger gaps” between of the gray scales of adjacent image pixels. The artifacts are generated by technical limitations in that the digitally controlled image does not provide a sufficient number of the gray scale.
As the mirrors are controlled to operate in a state of either ON or OFF, the intensity of light of a displayed image is determined by the length of time each mirror is in the ON position. In order to increase the number of gray scales of a display, the switching speed of the ON and OFF positions for the mirror must be increased. Therefore the digital control signals need be increased to a higher number of bits. However, when the switching speed of the mirror deflection is increased, a stronger hinge for supporting the mirror is necessary to sustain the required number of switches between the ON and OFF positions for the mirror deflection. In order to drive the mirrors with a strengthened hinge, a higher voltage is required. The higher voltage may exceed twenty volts and may even be as high as thirty volts. The mirrors produced by applying the CMOS technologies are probably not appropriate for operating the mirror at such a high range of voltages, and therefore DMOS mirror devices may be required. In order to achieve a higher degree of gray scale control, more complicated production processes and larger device areas are required to produce the DMOS mirror. Conventional mirror controls are therefore faced with a technical problem in that accuracy of gray scales and range of the operable voltage have to be sacrificed for the benefits of a smaller image display apparatus.
There are many patents related to light intensity control. These patents include U.S. Pat. Nos. 5,589,852, 6,232,963, 6,592,227, 6,648,476, and 6,819,064. There are further patents and patent applications related to different light sources. These patents include U.S. Pat. Nos. 5,442,414, 6,036,318 and Application 20030147052. Also, U.S. Pat. No. 6,746,123 has disclosed particular polarized light sources for preventing the loss of light. However, these patents or patent applications do not provide an effective solution to attain a sufficient number of the gray scale in the digitally controlled image display system.
Furthermore, there are many patents related to a spatial light modulation including U.S. Pat. Nos. 2,025,143, 2,682,010, 2,681,423, 4,087,810, 4,292,732, 4,405,209, 4,454,541, 4,592,628, 4,767,192, 4,842,396, 4,907,862, 5,214,420, 5,287,096, 5,506,597, and 5,489,952. However, these inventions do not provide a direct solution for a person skilled in the art to overcome the above-discussed limitations and difficulties.
In view of the above problems, US Patent Application 20050190429 has disclosed a method for controlling the deflection angle of the mirror to express higher gray scales of an image. In this disclosure, the intensity of light obtained during the oscillation period of the mirror is about 25% to 37% of the intensity of light obtained while the mirror is held in the ON position continuously.
According to this control process, it is not necessary to drive the mirror at a high speed. Also, it is possible to provide a higher number of the gray scale using a hinge with a low elastic constant. Hence, such a control makes it possible to reduce the voltage applied to the landing electrode.
An image display apparatus using the mirror device described above is broadly categorized into two types: a single-plate image display apparatus implemented with only one spatial light modulator and a multi-plate image display apparatus implemented with a plurality of spatial light modulators. In the single-plate image display apparatus, a color image is displayed by changing, in turn, the color (i.e. frequency or wavelength) of projected light over time. In a multi-plate the image display apparatus, a color image is displayed controlling the multiple spatial light modulators, corresponding to beams of light having different colors (i.e. frequencies or wavelengths), to modulate and combine the beams of light continuously.
For projection apparatuses there has been an increasing demand for high-resolution definitions, such as a full high definition (Full-HD; 1920×1080 pixels) television these days, prompting the development of higher resolution display techniques.
A mirror device is a spatial light modulators used for such a projection apparatus. The mirror device is comprised of a mirror array of one to eight million mirror-elements in two dimensions on a device substrate.
In order to meet the demand for ever-higher resolutions in projection apparatuses, the number of mirror elements must be increased. The increase in the number of mirror elements increases the size of the mirror device, which, in turn, increases the size of the projection apparatus, which is an undesirable result. Therefore, there is a need to decrease the size of the mirror device in order to project a higher resolution image while maintaining the current size of the projection apparatus. There is also a need to decrease the size of the mirror of each mirror element in order to decrease the size of the mirror device.
Additionally, there is a package for protecting the mirror device. One aspect of the package to store cover the mirror device by forming an intermediate member extended from the device substrate of the mirror device to support and attach to a cover glass.
Such a configuration, however, requires the device substrate be enlarged in order to accommodate the intermediate member. This in turn decreases the number of device substrates that can be cut from one semiconductor wafer, which increases the cost (and, eventually, the price) of the device substrate.
Furthermore, decreasing the number of device substrates that can be cut from one semiconductor wafer increases the ratio of one failed device substrate to the total number of failed device substrates proportionate to the number of device substrates cut from one wafer.
Additionally, the current configuration of such a package is a mirror device that is placed on a ceramic substrate separate from the device substrate and covered with a metallic cover.
This metallic cover excels in dissipating heat to prevent the inside of the package from temperature rise due to heat caused by the light irradiated on the mirror device and the heat generated by its operation.
However, it is not easy to produce a metallic cover in the desired form. Furthermore, increasing the surface area of the metallic cover increases the impact of thermal expansion, which tends to deform the metallic cover.
Such a mirror device is heated by 1) the external heat from the light source and 2) the internal heat generated by the operation of the mirror device.
The heating of the mirror device causes thermal expansion. This in turn changes the positions of the individual mirrors placed on the substrate surface, and creates a crack in the substrate and a separation of constituent components, thus hampering the function of the mirror device. Therefore, an improvement in the heat dissipation efficiency of the mirror device is needed.
Furthermore, the design of the package is faced with many problems in association with the decrease in size of the mirror device.
For example, a mirror array comprising about two million pixels used for Full HD is currently about 24.1 mm (0.95 inches) diagonally. In order to make a mirror anywhere between 10.2 mm and 22.1 mm (i.e., between 0.4 and 0.87 inches) in size, the mirror must be decreased in size and the package must be designed with consideration of the following: the heat dissipation of heat generated by the mirror device, the reduction of floating capacitance, the shielding of light to avoiding extraneous incident light, and a change in the form of package due to heat.
The following lists conventional techniques related to the package of a mirror device.
Reference patent document 1 provides components of the diffraction grating and light modulation device with a package of potting resin.
Reference patent document 2 provides a substrate on which mirrors are formed with a package with a cover glass.
Reference patent document 3 provides a substrate on which mirrors are formed with a package with a cover glass.
Reference patent document 4 provides a substrate on which mirrors are formed with a package with a cover glass.
Reference patent document 5 provides a substrate on which mirrors are formed that is joined to a cover glass with an epoxy adhesive.
Reference patent document 6 provides a cover glass welded with a metallic sealing ring.
Reference patent document 7 provides a substrate on which mirrors are formed with package with a cover glass, and the aforementioned product is further packaged with another substrate and a cover glass. The patent also provides substrates that are separately sandwiched on the bottom surface of a silicon substrate.
Reference patent document 8 provides a light shield mask that is placed inside of a package substrate having a cavity.
Reference patent document 9 provides a shortened distance between a mirror element and a transparent substrate.
Reference patent document 10 provides a shortened distance between a mirror element and a transparent substrate.
Reference patent document 11 provides a position of the cover glass not covering the light-blocking layer that is shifted from the position of the mirror array.
Reference patent document 12 provides a position of the cover glass not covering the light-blocking layer that is shifted from the position of a mirror array.
Reference patent document 13 provides a light absorption layer on the inside wall of the package.
Reference patent document 14 provides a substrate comprising a transparent electrode electrically connected to another electrode.
Reference patent document 15 provides a getter provided inside of a package.
Reference patent document 16 provides a desiccant between two substrates.
Reference patent document 17 provides an inactivating material enclosed inside of the package.
Reference patent document 18 provides an inactivating material is enclosed inside of the package.
Reference patent document 19 provides a wiring and a package that comprises a line.
Reference patent document 20 provides that the position of the device substrate on a package substrate is determined using the outer form of the device substrate.
Reference patent document 21 provides an optical device placed inside of one package.
Reference patent document 22 provides multiple optical devices placed on a single substrate.
Reference patent document 23 provides a liquid or solid optical material layered between two substrates.
Reference patent document 24 provides a structural column used for joining a MEMS substrate and another substrate together with soldering.
Reference patent document 25 provides a sealing member possessing a melting point that is no lower than 160 degrees C.
Reference patent document 26 provides a heater inside of a substrate.
Reference patent document 27 provides a heater inside of a substrate.
Reference patent document 28 provides multiple support columns accommodated between multiple of substrates.
Reference patent document 29 provides a mirror comprising a deflection axis not parallel to the side of the outer form of the mirror array.
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